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Cisco

Cisco ASR1000-SIP40 | ASR 1000 40G SPA Interface Processor, 4 SPA Bays

SKU:ASR1000-SIP40

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Description

The ASR1000-SIP40 is a hot-swappable SPA Interface Processor for the Cisco ASR 1000 Series. It acts as the carrier card for shared port adapters, giving WAN and MAN aggregation, service provider edge and enterprise edge routers a way to terminate Ethernet, ATM, PoS and serial interfaces on a single line card.

It provides up to 40 Gbps of non-oversubscribed bandwidth across four SPA bays. The bays accept four half-height SPAs, two full-height SPAs, or two half-height plus one full-height SPA. Port density reaches up to 24 ports per half-height SPA and 48 per full-height SPA, with a maximum of 96 ports in a mixed combination. Buffering is 128 MB ingress and 6 MB egress. Unlike the 10G ASR1000-SIP10, this 40G SIP is built for higher-throughput aggregation.

The SIP40 fits ASR 1004, ASR 1006 and ASR 1013 chassis with RP1 or RP2 and ESP10, 20, 40, 100 or 200. It takes its power from the chassis backplane, and features depend on the IOS XE image and feature licences on the host chassis.

Enquire with XS Network Tech for new or used pricing and availability.

Features

- 40 Gbps of non-oversubscribed throughput across four SPA bays
- Mix and match Ethernet, ATM, PoS, serial and channelized SPAs on one interface processor
- Online insertion and removal for the SIP and SIP-10 SPAs
- Enhanced QoS and timestamp support
- Ingress packet prioritisation based on Layer 2 or Layer 3 headers
- Line clocking reference distributed from a single SPA to the route processors
- Onboard Failure Logging (OBFL) for fault diagnostics
- Field-programmable device (FPD) upgrade support for all installed SPAs

Warranty

All products sold by XS Network Tech include a 12-month warranty on both new and used items. Our in-house technical team thoroughly tests used hardware prior to sale to ensure enterprise-grade reliability.

All technical data should be verified on the manufacturer data sheets.

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Technical Specifications

FAQs

Technical Specifications

- Aggregate bandwidth: up to 40 Gbps, non-oversubscribed
- ESI bandwidth to the carrier card: 11 to 46 Gbps
- SPA bays: 4 half-height, or 2 full-height, or 2 half-height + 1 full-height
- Ports per half-height SPA: up to 24
- Ports per full-height SPA: up to 48
- Maximum ports in mixed combination: 96
- Ingress buffering: 128 MB
- Egress buffering: 6 MB
- Supported SPA types: Ethernet, ATM, PoS, serial, channelized
- Unsupported SPAs: double-wide and double-high two-connector SPAs
- Hot swap: online insertion and removal (OIR) supported
- Onboard Failure Logging (OBFL): supported
- FPD support: all installed SPAs
- QoS: enhanced QoS and timestamp support
- Chassis compatibility: ASR 1004, ASR 1006, ASR 1013
- Power: supplied by the chassis backplane

FAQs

Q: Does the ASR1000-SIP40 need its own licence?
A: No separate licence is required for the SIP itself. Available features depend on the IOS XE software image and feature licences on the host ASR 1000 chassis.

Q: Which ASR 1000 chassis does it work in?
A: It is used in ASR 1004, ASR 1006 and ASR 1013 chassis with RP1 or RP2 and ESP10, 20, 40, 100 or 200. The SIP function is integrated on the ASR 1001-X and ASR 1002-X, so those models do not take a separate SIP.

Q: What SPA combinations can it hold?
A: It supports four half-height SPAs, two full-height SPAs, or two half-height plus one full-height SPA. Double-wide SPAs and double-high SPAs with two connectors are not supported.

Q: How does it differ from the ASR1000-SIP10?
A: The SIP40 provides up to 40 Gbps of non-oversubscribed bandwidth with four SPA bays, while the ASR1000-SIP10 is the 10G processor.

Q: How is it powered?
A: It draws power from the ASR 1000 chassis backplane and does not need a separate power supply.

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